The AD8159 is an asynchronous, protocol agnostic, quad-lane 2:1 switch with 12 differential PECL-/CML-compatible inputs and 12 differential CML outputs. The operation of this product is optimized for NRZ signaling with data rates of up to 3.2 Gbps per lane. Each lane offers two levels of input equalization and four levels of output pre-emphasis.

The AD8159 consists of four multiplexers and four demultiplexers, one per lane. Each port is a four-lane link, and each lane runs up to a 3.2 Gbps data rate, independent of the other lanes. The lanes are switched independently using the four select pins, SEL[3:0]; each select pin controls one lane of the port. The AD8159 has low latency and very low lane-to-lane skew.

The main application of the AD8159 is to support redundancy on both the backplane side and the line interface side of a serial link. The device has unicast and bicast capability; therefore, it can be configured to support either 1 + 1 or 1:1 redundancy.

The AD8159 supports reversing of the output and input pins on one of its ports, which helps to connect two ASICs with opposite pinouts.

The AD8159 is also used for testing high speed serial links by duplicating incoming data and sending it to the destination port and to the test equipment simultaneously.